Test procedure files describe the scan circuitry’s operation for the ATPG tool. They contain cycle based procedures and timing definitions that tell the DFT tools how to operate the scan structures in the design.

Before running ATPG you must be ready with a test procedure file to proceed further.

To specify a test procedure file in setup mode, use the Add Scan Groups command. The tools can also read in procedure files by using the Read Procfile command or the Save Patterns command when not in Setup mode. When you load more than one test procedure file, the tool merges the timing and procedure data.

Following are the standard test procedures: – test_setup, load_unload, shift Continue reading →

Some rules permit user-defined handling, allowing you to specify either error, warning, note, or ignore as the handling for certain rules. (use set drc handling command)

Setting the level of Gate Data using set gate level command. The gate level can be set to design level or primitive level. When the gate level is set to design level only you will be able to correlate the reported gate to the library model available in your netlist. When the design level is set to primitive level such correlation is possible to a limited extent and the reported gate can sometimes be nowhere found in the netlist.

The set gate report command sets the type of information you want to be displayed when you report a gate. You can set that to Normal or Trace or Error_pattern or tie_value

You can use the Report Gates command to display information for selected gates, which you identify by either a gate index number or a pin pathname of a pin connected to the gate. Report Gate is a very useful command. You can list all gates of a specific type using the -type switch and a histogram of all gates by setting the type to histogram. You can report on a path between two gates. you can browse back and forth using the f and b commands respectively.